Multicore World 2017
It is difficult to describe the annual Multicore World conference with brevity. For the past six years it has operated out of New Zealand, the brain-child of Nicolas Erdody of Open Parallel, and for five of those six years your ‘blogger has had the honour of MC for much of the proceedings. It is not a big conference by any stretch of the imagination, typically attracting around seventy participants. However rather like New Zealand itself, what it lacks in size it makes up with quality; Multicore World consistently manages to attract some of the most important names in computer science and the people dealing with the hardest of problems.
This year’s conference opened with Professor Satoshi Matsuoka giving an overview of Japan’s massive plans for developing High Performance Computing especially for the processing of large datasets and artificial intelligence. It was followed by a keynote by Professor Tony Hey on the convergence of data and compute in scientific research. Professor Michelle Simmons director of the Centre for Quantum Computation and Communication Technology gave an overview of the theory, current practise, and future plans of quantum computing. The opportunity has been taken to connect the with University of Melbourne’s Quantum Error Correction and Quantum Information project who are using a special Spartan partition researching the same. Spartan itself received special consideration, with your blogger presenting on the first year of implementation and the alternative HPC/cloud hybrid model used at the University of Freiburg. As a precursor to the following day’s emphasis on the SKA, Juan Guzman discussed the ASKAP Science Data Processing system, followed by Nathan DeBardeleben from Los Alamos National Laboratory on resilience (or the lack thereof) in supercomputing. The concluding keynote of the first day by Pete Beckman of the Northwestern Argonne Institute covered the use of computation for collecting and analysing real-time city event metrics.
The second day of Multicore World opened with Dr. Happy Sithole describing the implementation and operation of the Cheetah HPC system in South Africa and especially their education programme. This was followed by an address by the Honourable Paul Goldsmith, Minister for Tertiary Education, Skills and Employment, Minister of Science and Innovation, and Minister for Regulatory Reform. Their shadow, Clare Curran, was also at the conference (which she regularly attends) at participated in a subsequent panel. This was followed by three presentations and a panel on the Square Kilomtere Array, with the first presentation by Professor Andreas Wicene on Data Activated 流 (Liu) Graph Engine (DALiuGE), followed by Andrew Ensor on the status of the Square Kilometre Array in New Zealand, and finally Piers Harding on SKA-SDP middleware. Following this was two presentations on Linux kernel development, one from Balasz Gerofi on the IHK/McKernel multikernel and then by Paul McKenney on Read-Copy-Update. The day was concluded by a presentation on vehicular automation and technological dividends by the ever-entertaining and insightful Paul Fenwick.
The final day witnessed another presentation by Professor Satoshi Matsuoaka, on physical limitations to Moore’s Law with the observation that multicore was a change that can only occur once (however, see Angstrom Project. After another panel, this time on budgets, John Gustafson – noting hardware implementation issues with the Unums project, has proposed a variant – posits and valids – which have some of the advantages of unums whilst being easier to implement. In the afternoon, NZ ICT professional of the year, Victoria MacLennan spoke on the continuing issue of retaining women in STEM subjects, followed by Ralph Hignam on the technologies for early detection of breast cancer. Finally, to wrap up the conference, there were two keynotes, one from Professor Michael Kelly of Cambridge University on the manufacturing computational devices and the relationship with exascale computing, followed by ARM’s former head of architecture on the development of that reduced instruction set computing (RISC) architecture for computer processors.
This short ‘blog post can only giving passing justice to the enormous scope, depth of detail, and general importance of this small conference. From the university perspective the contacts, insights, and connections made here are essential for our own development and awareness. One can only look forward to future Multicore World’s and the results on the many initiatives that are announced at these events.